; E04-S01: PRG/MAP writer test in x128.
;
; The fixture runs in the compiler mapping and writes GENERATE.PRG/MAP with
; the fixed startup, a PAD section at $1C80, then checks:
;   +0  out_finish result (0)
;   +1  collision result (OUT_ERR_EXISTS)
;   +2  section-order result (OUT_ERR_ORDER)
;   +3  abort result (0)
; COLLIDE.PRG/MAP already exist on the test disk; the host verifies they are
; unchanged. ABORT and ORDER must leave no output behind.

.setcpu "6502"
.include "../../src/common/c128.inc"
.include "../../src/common/mailbox.inc"
.include "../../src/common/formats.inc"

.import mmu_init, mmu_bank0, mmu_shutdown
.import out_begin, out_startup, out_section, out_end_section
.import out_byte, out_bytes, out_finish, out_abort
.import out_load, out_entry, out_start, out_err

.segment "LOADADDR"
        .word $1C01

.segment "EXEHDR"
        .word basic_end
        .word 10
        .byte $9E
        .byte "7181"
        .byte $00
basic_end:
        .word $0000

.segment "MAILBOX"
        .res MB_SIZE

.segment "STARTUP"
.export test_entry
test_entry:
        php
        sei
        ldx #MB_SIZE - 1
        lda #$00
@clr:   sta MB_BASE,x
        dex
        bpl @clr
        lda #MB_MAGIC0_VALUE
        sta MB_MAGIC0
        lda #MB_MAGIC1_VALUE
        sta MB_MAGIC1
        lda #MB_PROD_PLATFORM
        sta MB_PRODUCER
        lda #MB_ST_RUNNING
        sta MB_STATUS
        lda #$00
        sta fail_mask
        sta MB_DATA+0
        sta MB_DATA+1
        sta MB_DATA+2
        sta MB_DATA+3

        jsr mmu_init
        jsr mmu_bank0

        lda #<PRG_LOAD_ADDR
        sta out_load
        lda #>PRG_LOAD_ADDR
        sta out_load+1
        lda #<PRG_ENTRY_ADDR
        sta out_entry
        lda #>PRG_ENTRY_ADDR
        sta out_entry+1

        ; ------------------------------------------------ successful output
        lda #<name_generate
        ldx #>name_generate
        ldy #name_generate_len
        jsr out_begin
        bcs @gen_fail
        jsr out_startup
        bcs @gen_fail
        lda #$80
        sta out_start
        lda #$1C
        sta out_start+1
        lda #<name_pad
        ldx #>name_pad
        ldy #3
        jsr out_section
        bcs @gen_fail
        lda #<pad_bytes
        ldx #>pad_bytes
        ldy #4
        jsr out_bytes
        bcs @gen_fail
        jsr out_end_section
        jsr out_finish
        bcs @gen_fail
        lda out_err
        sta MB_DATA+0
        cmp #OUT_OK
        beq @gen_done
        lda #$01
        jsr fail
        jmp @gen_done
@gen_fail:
        lda out_err
        sta MB_DATA+0
        lda #$01
        jsr fail
        jsr out_abort
@gen_done:

        ; ---------------------------------------------------- collision
        lda #<name_collide
        ldx #>name_collide
        ldy #name_collide_len
        jsr out_begin
        bcc @coll_unexpected
        lda out_err
        sta MB_DATA+1
        cmp #OUT_ERR_EXISTS
        beq @coll_ok
        lda #$02
        jsr fail
        jmp @coll_abort
@coll_unexpected:
        lda #$02
        jsr fail
        jmp @coll_abort
@coll_ok:
@coll_abort:
        jsr out_abort
@coll_done:

        ; ------------------------------------------------ section order
        lda #<name_order
        ldx #>name_order
        ldy #name_order_len
        jsr out_begin
        bcs @order_begin_fail
        lda #$00
        sta out_start
        lda #$1C
        sta out_start+1
        lda #<name_bad
        ldx #>name_bad
        ldy #3
        jsr out_section
        bcc @order_unexpected
        lda out_err
        sta MB_DATA+2
        cmp #OUT_ERR_ORDER
        beq @order_abort
        lda #$04
        jsr fail
        jmp @order_abort
@order_begin_fail:
        lda out_err
        sta MB_DATA+2
        lda #$04
        jsr fail
        jmp @order_done
@order_unexpected:
        lda #$04
        jsr fail
        jmp @order_abort
@order_abort:
        jsr out_abort
@order_done:

        ; -------------------------------------------------------- abort
        lda #<name_abort
        ldx #>name_abort
        ldy #name_abort_len
        jsr out_begin
        bcs @abort_fail
        lda #$01
        sta out_start
        lda #$1C
        sta out_start+1
        lda #<name_x
        ldx #>name_x
        ldy #1
        jsr out_section
        bcs @abort_fail
        lda #$AA
        jsr out_byte
        bcs @abort_fail
        jsr out_abort
        bcs @abort_fail
        lda out_err
        sta MB_DATA+3
        cmp #OUT_OK
        beq @abort_done
@abort_fail:
        lda out_err
        sta MB_DATA+3
        lda #$08
        jsr fail
        jsr out_abort
@abort_done:

        jsr mmu_shutdown
        lda fail_mask
        sta MB_CODE
        lda #$00
        sta MB_CODE+1
        lda #MB_ST_FAIL
        ldx fail_mask
        bne @status
        lda #MB_ST_PASS
@status:
        sta MB_STATUS
        ldy #$00
@print: lda message,y
        beq @end
        sty print_y
        jsr CHROUT
        ldy print_y
        iny
        bne @print
@end:   rts

.segment "CODE"
fail:
        ora fail_mask
        sta fail_mask
        rts

.segment "RODATA"
name_generate:   .byte "GENERATE.N8"
name_generate_len = * - name_generate
name_collide:    .byte "COLLIDE.N8"
name_collide_len = * - name_collide
name_order:      .byte "ORDER.N8"
name_order_len = * - name_order
name_abort:      .byte "ABORT.N8"
name_abort_len = * - name_abort
name_pad:        .byte "PAD"
name_bad:        .byte "BAD"
name_x:          .byte "X"
pad_bytes:       .byte $DE, $AD, $BE, $EF
message:         .byte "NOVA128 OUTPUT TEST DONE", $0D, $00

.segment "BSS"
fail_mask:       .res 1
print_y:         .res 1